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52 search results found
Vitis Ai
⭐
1,276
Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.
Brevitas
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1,015
Brevitas: neural network quantization in PyTorch
Nmigen
⭐
589
A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen
Edalize
⭐
573
An abstraction library for interfacing EDA tools
Litex Boards
⭐
325
LiteX boards files
Poc
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324
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
Xilinxboardstore
⭐
205
Guinness
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172
GUINNESS: A GUI-based binarized deep Neural NEtwork SyntheSizer toward an FPGA
Hdl_checker
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136
Repurposing existing HDL tools to help writing better code
Litesata
⭐
118
Small footprint and configurable SATA core
Cocotbext Pcie
⭐
101
PCI express simulation framework for Cocotb
Vim Hdl
⭐
53
Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)
Pyxsi
⭐
46
Python/C/RTL cosimulation with Xilinx's xsim simulator
Bscan_spi_bitstreams
⭐
44
FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.
Resnet50 Pynq
⭐
37
Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
Hwtlib
⭐
33
hardware library for hwt (= ipcore repo)
Pyfpga
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31
A Python package to use FPGA development tools programmatically.
Pyxir
⭐
28
Fpgatools
⭐
25
Tools for FPGA development.
Tbengy
⭐
22
Python Tool for UVM Testbench Generation
Openocd Xilinx Loader
⭐
18
Some Python scripts to program Xilinx FPGAs using OpenOCD
Go Pynq
⭐
18
Xilinx Contest Kshitij 2019
2019_summercamp
⭐
17
2019 SEU-Xilinx Summer School
Marble
⭐
16
Dual FMC FPGA carrier board developed for general purpose use in particle accelerator electronics instrumentation.
Sign_language_mnist
⭐
15
Tutorial for Vitis AI using the Sign Language MNIST
Anasymod
⭐
14
A framework for FPGA emulation of mixed-signal systems
Xilinx Build Scripts
⭐
14
SCons (make-like) scripts for building FPGA code with Xilinx tools
Study Materials
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12
Ipbb
⭐
11
IPbus Builder Tool
Fpga Mandelbrot
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11
FPGA mandelbrot accelerator via high speed/super speed USB
Rules_vivado
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11
Bazel rules for Xilinx Vivado
Axi Traffic Gen
⭐
10
File editor for the Xilinx AXI Traffic Generator IP
Flower_classification_vai_tf_numpy_array
⭐
10
The project is a simple example about how to use TensorFlow to train a ConNet model from labeled dataset and then use Vitis AI tools to deploy the model into Xilinx FPGA(ZCU102 board). To make it easier to deploy with Vitis AI. I just use numpy array as input data and OpenCV function to open images. And there is backup for DNNDK3.1 tag
Bin2coe
⭐
10
A tool to convert binary files to COE files 💫
Aws Remote Desktop For Eda
⭐
9
Launch Xilinx Vivado Design Suite using a DCV Remote Desktop on AWS
Hdlgen Chatgpt
⭐
9
HDLGen-ChatGPT, works in tandem with ChatGPT-3.5 chat interface to enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and testbenches, and AMD Vivado and Intel Quartus Electronic Design Automation (EDA) project
Vlab
⭐
9
The RTS Virtual Lab
Manta
⭐
8
An In-Situ Debugging Tool for Programmable Hardware
Pynq Juliabrot
⭐
8
Ezynq
⭐
8
mirror of https://git.elphel.com/Elphel/ezynq
Msp6prog
⭐
7
Minispartan6+ Configure Tool
Bal Xilinx
⭐
7
Abstraction layer for Xilinx FPGAs
Summer Project Chip Test Program On Xilinx Zedboard
⭐
7
Rhino Gateware
⭐
6
Rhino platform application build tools
Flower_classification_vai_tf_dataset
⭐
6
The project show how to quick train a model and deploy it on Xilinx FPGA using TensorFlow and Vitis AI. It uses tf.data.Dataset API to handle input data, so that the input function need to be rewritten. And there is a backup for DNNDK 3.1 tag
Xc9500
⭐
6
WIP open source tooling for the XC9500 / XC9500XL series of CPLDs from Xilinx.
Xvcd_server
⭐
5
Xilinx Virtual Cable server written in python connecting Xilinx with different JTAG adapters
Yaaes
⭐
5
Yet Another AES implementation in hardware.
Visual System Integrator
⭐
5
Visual System Integrator - Accelerate your embedded development
Bundle
⭐
5
FPGA-accelerated array computing
P4hls
⭐
5
P4 compatible HLS modules
Chisel Packaging
⭐
5
IPXACT packaging utilities for Chisel 3.x using Xilinx Vivado Design Suite.
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