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The Top 23 Verilog Xilinx Open Source Projects

Open source projects categorized as Verilog Xilinx
Categories > Hardware > Verilog
Categories > Xilinx
Hdlgen Chatgpt ⭐ 9
HDLGen-ChatGPT, works in tandem with ChatGPT-3.5 chat interface to enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and testbenches, and AMD Vivado and Intel Quartus Electronic Design Automation (EDA) project
most recent commit 3 months ago
Hls_ldpc_dec ⭐ 9
Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..
most recent commit 5 years ago
Manta ⭐ 8
An In-Situ Debugging Tool for Programmable Hardware
most recent commit 4 months ago
Basic Hdl Template ⭐ 8
A simple template for simple FPGA projects (mostly Verilog HDL and Xilinx Toolchain)
most recent commit 10 years ago
Lane Detection With Implementation On Fpga ⭐ 8
Realization of Lane Detection on CPU and implementation on FPGA using SDSOC and VIVADO. Key terms for used softwares: C++, OpenCV, xfOpenCV, Verilog, Xilinx, Vivado, SdSoC.
most recent commit 4 years ago
Mastering Fpgasic Book ⭐ 8
📖 Mastering FPGASIC Book
most recent commit 2 years ago
Axicores ⭐ 8
AXI4-Compatible Verilog Cores, along with some helper modules.
most recent commit 4 years ago
Sigma ⭐ 8
most recent commit 3 years ago
Fpga Spi Flash ⭐ 8
Various projects of SPI loader module for xilinx fpga
most recent commit 4 years ago
Gameboy ⭐ 8
18-545 Fighting Meerkats
most recent commit 10 years ago
Oram_fpga ⭐ 8
FPGA related files for ORAM
most recent commit 9 years ago
Verilog_calculator_matrix_multiplication ⭐ 8
This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
most recent commit 7 years ago
Cpuonfpga ⭐ 8
It's a basic computer designed using VERILOG on XILINX FPGA architecture.
most recent commit 7 years ago
Fluent10g ⭐ 8
Programmable FPGA-based Network Tester for Multi-10-Gigabit Ethernet
most recent commit 4 years ago
Pymtl Tut Hls ⭐ 8
Tutorial for integrating PyMTL and Vivado HLS
most recent commit 8 years ago
Pciebench Netfpga ⭐ 8
pcie-bench code for NetFPGA/VCU709 cards
most recent commit 6 years ago
Cstron ⭐ 7
FPGA-based CSTN monitor
most recent commit 6 years ago
Sitcp_netlist_for_kintex7 ⭐ 7
most recent commit 4 months ago
Verilog Spi ⭐ 7
This is a SPI Master Module Written in Verilog
most recent commit 6 years ago
Core_sdram_axi4 ⭐ 7
SDRAM controller with AXI4 interface
most recent commit 5 years ago
Fpga Camera Mipi Dvp Verilog ⭐ 7
FPGA Camera Parallel & MIPI Verilog
most recent commit 3 months ago
Openxc7 Tetrisaraj ⭐ 7
Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our special Video Controller in Basys3 Artix7-35T. Complemented with SW in the bare-metal 'C' they, together, make for this classic game. Except that it's now, in the standard BiH tradition, with a twist of our own.
most recent commit 4 months ago
Mandelbrot ⭐ 6
A Verilog based Fractal Set Generator for the Xilinx Artix 7
most recent commit 2 years ago
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