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The Top 5 Verilog Vhdl Vivado Open Source Projects

Open source projects categorized as Verilog Vhdl Vivado
Categories > Hardware > Verilog
Categories > Hardware > Vhdl
Categories > Vivado
Edalize ⭐ 573
An abstraction library for interfacing EDA tools
dependent packages 3total releases 24most recent commit 3 months agopypi edalize} Downloads
Image Processing ⭐ 123
Image Processing Toolbox in Verilog using Basys3 FPGA
most recent commit 7 months ago
Tinytpu ⭐ 111
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
most recent commit 5 years ago
Intfftk ⭐ 56
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
most recent commit a year ago
Hdlgen Chatgpt ⭐ 9
HDLGen-ChatGPT, works in tandem with ChatGPT-3.5 chat interface to enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and testbenches, and AMD Vivado and Intel Quartus Electronic Design Automation (EDA) project
most recent commit 3 months ago
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