Awesome Open Source
Search
Programming Languages
Languages
All Categories
Categories
About

The Top 23 Risc V Systemverilog Open Source Projects

Open source projects categorized as Risc V Systemverilog
Categories > Hardware > Risc V
Categories > Systemverilog
Ibex ⭐ 1,169
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
most recent commit 3 months ago
Scr1 ⭐ 688
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
most recent commit 7 months ago
Core V Verif ⭐ 359
Functional verification project for the CORE-V family of RISC-V cores.
most recent commit 3 months ago
Verigpu ⭐ 323
OpenSource GPU, in Verilog, loosely based on RISC-V ISA
most recent commit a year ago
Ustc Rvsoc ⭐ 261
An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC，包含一个简单且可扩展的外设总线。
most recent commit 8 months ago
Core V Mcu ⭐ 153
This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
most recent commit 4 months ago
Riscv Dbg ⭐ 153
RISC-V Debug Support for our PULP RISC-V Cores
most recent commit 6 months ago
Soomrv ⭐ 82
A simple superscalar out of order RISC-V (micro)processor
most recent commit 5 months ago
Cheshire ⭐ 80
A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
most recent commit 5 months ago
Hero ⭐ 77
Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and an application-class host CPU, including full-stack software and hardware.
most recent commit 8 months ago
Superscalar Riscv Cpu ⭐ 69
SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.
most recent commit 4 years ago
Vicuna ⭐ 60
RISC-V Zve32x Vector Coprocessor
most recent commit a year ago
Riscv Simple Sv ⭐ 56
A simple RISC V core for teaching
most recent commit 2 years ago
Parallella Riscv ⭐ 55
RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
most recent commit 5 years ago
Aps Reborn ⭐ 45
Методические материалы по разработке процессора архитектуры RISC-V
most recent commit 3 months ago
Kronos ⭐ 39
Kronos is a 3-stage in-order RISC-V RV32I_Zicsr_Zifencei core geared towards FPGA implementations
most recent commit a year ago
Axi Crossbar ⭐ 38
An AXI4 crossbar implementation in SystemVerilog
most recent commit a year ago
Fpu ⭐ 37
IEEE 754 floating point library in system-verilog and vhdl
most recent commit 7 months ago
Cva6 Softcore Contest ⭐ 31
National RISC-V student contest CV32A6
most recent commit 4 months ago
Riscv Vip ⭐ 29
For pre-silicon developers of RISC-V systems, riscv-vip is a SystemVerilog project that helps with pre-si verification and debug
most recent commit 3 years ago
Gpcore ⭐ 28
This is the base repo for our graduation project in AlexU 21
most recent commit 3 years ago
Fpu Sp ⭐ 19
IEEE 754 floating point library in system-verilog and vhdl
most recent commit 6 months ago
Mill ⭐ 17
RV32I by cats
most recent commit 8 months ago
Popular Hardware Categories
Arduino
Raspberry Pi
Camera
Sensor
Gpu
Firmware
Usb
Keyboard
Cpu
Arm
Categories
Privacy | About | Terms | Follow Us On Twitter

Downloads, Dependent Repos, Dependent Packages, Total Releases, Latest Releases data powered by Libraries.io.

Copyright 2018-2024 Awesome Open Source.  All rights reserved.