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14 search results found

Vivado Risc V ⭐ 682

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack

Rc Fpga Zcu ⭐ 43

Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)

A Python package to use FPGA development tools programmatically.

Innova2_flex_xcku15p_notes ⭐ 29

Nvidia/Mellanox Innova-2 Flex Open Programmable SmartNIC Setup and Usage Notes for XCKU15P FPGA Development

Custom_part_data_files ⭐ 28

Xilinx PCIe to MIG DDR4 example designs and custom part data files

Tcl_for_fpga ⭐ 15

TCL scripts for FPGA (Xilinx)

Innova2_xcku15p_ddr4_bram_gpio ⭐ 9

XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA

PYNQ DMA benchmark project

A Python package for running IBERT Eye scan in Vivado, ploting eye diagrams with mathplotlib and compiling results with LaTeX

Hdu_co_guide ⭐ 6

HDU Computer Organization Course Design Beginner Guide - 杭电计组课设新手指南

F4pga Xc Fasm2bels ⭐ 6

Library to convert a FASM file into BELs importable into Vivado.

Make Fpga ⭐ 5

Set of scripts for Vivado's project handling

Zcu102_two_cameras ⭐ 5

ZCU102 two IMX274 camera design.

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