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system-on-chip x

25 search results found

Litex ⭐ 2,546

Build your hardware, easily!

Neorv32 ⭐ 1,337

🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Openlane ⭐ 1,148

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy

💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

Kactus2dev ⭐ 168

Kactus2 is a graphical EDA tool based on the IP-XACT standard.

Awesome Retro Docs ⭐ 68

A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.

Antikernel ⭐ 65

The Antikernel operating system project

A Modeling and Verification Platform for SoCs using ILAs

Esp32_thing ⭐ 57

Development platform for the Espressif ESP32 WiFi/Microcontroller SoC

Introduction To Soc Design Education Kit ⭐ 53

Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the peripherals

Small Processing Unit 32: A compact RV32I CPU written in Verilog

Qnice Fpga ⭐ 46

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.

A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems

Fpga Game Design ⭐ 23

Fireboy & Water Girl in the Forest Temple implemented on an FPGA board for UIUC's ECE385 Digital Systems Laboratory.

Riscv Atom ⭐ 14

An open-source 32-bit RISC-V soft-core processor for FPGAs.

Litex Template ⭐ 12

Template project for LiteX-based SoCs

Riscv_soc ⭐ 10

Basic RISC-V Test SoC

Pet On A Chip ⭐ 9

Vsdbabysoc ⭐ 9

VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.

System-on-Chip Resource Adaptive Scheduling using Deep Reinforcement Learning

Xsoc Xr16 ⭐ 8

System-on-a-Chip for FPGA, with xr16 RISC core and LCC port

Transfercl ⭐ 8

TransferCL: an open framework for transfer learning on mobile device

A custom C API for instrumenting Jetson TX1’s SoM and SoC

Related Searches

Fpga System On Chip (18)

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C System On Chip (8)

Risc V System On Chip (8)

1-25 of 25 search results

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