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10 search results found

Openroad ⭐ 1,102

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

Code generation tool for configuration and status registers

Openroad Flow Scripts ⭐ 233

OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/la

Open Register Design Tool ⭐ 169

Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

Vsdflow ⭐ 121

VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using VSD (RTL-to-GDS) FLOW. VSDFLOW is completely build using OPHW tools, where the user gives input RTL in verilog. From here on the VSDFLOW takes control, RTL is synthesized (using Yosys). The synthesized netlist is given to PNR tool (Qflow) and finally Sign-off is done with STA tool (using Ope

WAL enables programmable waveform analysis.

Rdf 2019 ⭐ 14

Hdl Modules ⭐ 10

A collection of reusable, high-quality, peer-reviewed VHDL building blocks.

Blockwork ⭐ 9

An opinionated build environment for EDA projects

Quantum Electronics Design Automation - The RTL of Quantum Computing

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