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11 search results found

A secure embedded operating system for microcontrollers

Alios Things ⭐ 4,437

面向IoT领域的、高可伸缩的物联网操作系统，可去官网了解更多信息https://www.aliyun

Os_kernel_lab ⭐ 3,895

OS kernel labs based on Rust/C Lang & RISC-V 64/X86-32

Rcore ⭐ 3,099

Rust version of THU uCore OS. Linux compatible.

Rcore Tutorial V3 ⭐ 1,327

Let's write an OS which can run on RISC-V in Rust from scratch!

Rcore Tutorial Book V3 ⭐ 1,062

A book about how to write OS kernels in Rust easily.

Mini Riscv Os ⭐ 242

Build a minimal multi-tasking OS kernel for RISC-V from scratch

Microkernel and userspace written in Rust exploring modern ideas

Xv6 Book Chinese ⭐ 190

MIT操作系统工程的教学操作系统Xv6的源码剖析中文翻译项目，使用ANSI标准C重新在riscv架构 v6；

Core Os Riscv ⭐ 180

🖥️ An xv6-like operating system on RISC-V with multi-core support. Documentation available online.

Phoenix Rtos Kernel ⭐ 99

Phoenix-RTOS microkernel repository

Multiplix ⭐ 88

An operating system kernel for RISC-V and AArch64 SBCs

UNIX-like operating system written in C and C++

Rust Kernel Riscv ⭐ 69

RISC-V kernel implemented with Rust

Xv6 K210 ⭐ 45

Port XV6 to K210 board!

Yuanix Riscv Os ⭐ 34

Build a minimal kernel for RISC-V

Proj4 Xv6 Rust ⭐ 29

用Rust语言重新设计与实现xv6

Hse Acos Course ⭐ 23

Materials for the "Computer Architecture and Operating Systems" course taught at Faculty of Computer Science of Higher School of Economics

Proj7 Terminus ⭐ 19

可运行OS的RISCV-64的硬件模拟器设计与实现

The Gee (寂) Operating System, written in YuLang.

Bbl Ucore ⭐ 16

uCore OS Labs on Berkeley bootloader

ARINC653 Multi-Partition Operating System Based On RISC-V, capable of running on SiFive HiFive Unmatched.

Corepartition ⭐ 16

Universal Cooperative Multithread Lib with real time Scheduler that was designed to work, virtually, into any modern micro controller or Microchip and, also, for user space applications for modern OS (Mac, Linux, Windows) or on FreeRTOS as well. Supports C and C++

Rust Osdev Jumpstart ⭐ 11

Rust, cargo and QEMU setup for multi-architecture OS development.

A Unix-like and microkernel-based operating system for ARM

Os 4 Risc V ⭐ 8

Seminar0 20201226 ⭐ 7

RISC-V SingleCycle/Pipeline CPU (lab of ZJU Computer System Series)

A kernel with support to the RISCV architecture

A complete RISC-V computer system built from scratch running on FPGA

Toddler Ng ⭐ 6

The next generation Toddler, a well designed usable and portable microkernel OS

X Runikraft ⭐ 6

2022 USTC 011705 (OSH) Course Project of Runikraft Group

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