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Search results for cpu register

51 search results found

16bitjs ⭐ 390

💻 A 16-bit virtual machine, including assembly language with 37 instructions, binary assembler, and a step through debugger

Highly portable Zilog Z80 CPU emulator written in ANSI C

A Game Boy emulator with dynamic recompilation (JIT)

Example of CPU simulation in software

Maplesyrup ⭐ 115

Assesses CPU security of embedded devices. #nsacyber

A very primitive but hopefully self-educational CPU in Verilog

An assembler compiler and bytecode virtual machine implemented in ruby for a made up CPU.

But How Do It Know ⭐ 53

Let's bring the Scott CPU to life. And program it.

Python Based ARM CoreSight Debug and Trace Tools

Cpuid.jl ⭐ 49

Ask the CPU for cache sizes, SIMD feature support, a running hypervisor, and more.

Small Processing Unit 32: A compact RV32I CPU written in Verilog

Register Rs ⭐ 48

Unified interface for type-safe MMIO and CPU register access in Rust

Asm Simulator ⭐ 47

16-bit Assembler Simulator

Gmachine ⭐ 46

A set of Go exercises implementing a virtual computer system

Mips Visualiser ⭐ 45

Interactive MIPS processor simulation and visualisation

Acheronvm ⭐ 44

Reconfigurable 16-bit Virtual CPU for 6502 computers

Motorola 6809 emulator in JavaScript

An implementation of the Z80 CPU for Altera, Xilinx and Lattice FPGAs

Z80 512k ⭐ 35

Z80 CPU and Memory Module

The Bareflank Processor Abstraction Layer

x86info : x86 processor register decoder.

Smachine ⭐ 32

Simple Machine, include simulator、ccompiler、assembler

A Z80 core written in Java

Z80 Emulator ⭐ 27

Cpu Simulator ⭐ 22

HTML5 CPU Simulator (8 bit binary implementation of Little Man Computer)

A simple 16-bit CPU built in Logisim

Nolimix86 ⭐ 16

LLVM-based x86 emulator with support for unlimited virtual registers, used before the register allocation pass

Gru_android ⭐ 14

An RNN (GRU) TensorFlow Android App for word prediction.

Chip8 Js ⭐ 14

CHIP-8 arcade CPU emulator in JavaScript

Cpu Emulator ⭐ 13

Emulating an 8-bit CPU in Ruby

Mostly AVR compatible FPGA soft-core

16 bit RISC-V proof of concept

Eightthirtytwo ⭐ 12

An experimental CPU core with 8-bit instruction words and 32-bit registers

Eatercpusimulation ⭐ 12

A simulation of Ben Eater's 8-bit CPU in Logisim Evolution (Holy Cross Edition).

Fpganes_release ⭐ 11

Reconstructing NES game console on Altera DE1-SOC FPGA using System Verilog

A 16-bit computer implemented with Logisim (logical circuit simulator).

Freertos_arm_cm4f ⭐ 9

FreeRTOS port for Cortex-M4F CPUs with FPU support

Fun with compilers, interpreters and such.

Hd6309 Computer ⭐ 9

A computer based on the HD6309 CPU, done for the Retro Challenge 2017/04.

Gpio Toggle Exercise ⭐ 8

Thumb 2 assembly exercise for toggling a GPIO on an STM32F4

Metamachine ⭐ 7

Experimental CPU with software-defined instruction set.

KPU - the RISC based Open Source CPU

Pipelined Ultimate Reduced Instruction Set Computer

JS virtual machine implementation for education purpose

Ustc Tmips ⭐ 6

Human Based Paper Computer (HBPC-1)

Sap 1 V2 Mojo ⭐ 5

SAP-1 CPU in Verilog for the Mojo FPGA board - has seperate address bus.

A CPU that implementing THCO-MIPS16 instruction set.

Librapl is a library that simplifies access to the RAPL values in MSR registers of modern Intel CPUs.

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