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33 search results found
Bsv_tutorial_cn
⭐
381
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程,介绍了BSV的调度、FIFO数据流、多态等高级特性,展示了BSV相比于传统Verilog开
Flute
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328
RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance
Connectal
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153
Connectal is a framework for software-driven hardware development.
Kami
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130
A Platform for High-Level Parametric Hardware Specification and its Modular Verification
Cobalt
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92
A collection of common Bluespec interfaces/modules.
Riscy Ooo
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54
RiscyOO: RISC-V Out-of-Order Processor
P4fpga
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46
P4-14/16 Bluespec Compiler
Riscy
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45
Riscy Processors - Open-Sourced RISC-V Processors
Bluespecpcie
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37
PCIe library for the Xilinx 7 series FPGAs in the Bluespec language
Beri
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35
The BERI and CHERI processor and hardware platform
Tinsel
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32
Manythread RISC-V overlay for FPGA clusters
Bsc Contrib
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29
A place to share libraries and utilities that don't belong in the core bsc repo
Bluespec_bsv_tutorial
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27
Bluespec BSV HLHDL tutorial
Maeri_bsv_isca2018
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23
MAERI public release
Bluecheck
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21
A generic test bench written in Bluespec
Riscv_isa_formal_spec_in_bsv
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16
A formal spec of the RISC-V Instruction Set Architecture, written in Bluespec BSV (executable, synthesizable)
Opensmart
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16
Public release
Clarinet
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14
A RISC-V processor written in BSV, based on the Flute core. Has support for integrating tightly-coupled accelerators, and for integrating custom functional units like posit arithmetic units.
Bluestuff
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13
A Bluespec SystemVerilog library of miscellaneous components
Alterajtaguart
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11
Altera JTAG UART wrapper for Bluespec
Rvbs
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11
RISC-V BSV Specification
Omnixtendendpoint
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10
Hardware implementation of an OmniXtend Memory Endpoint/Lowest Point of Coherence.
Ixayoi
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10
(WIP) A relatively simple pipelined RISC-V core, written in Bluespec SystemVerilog
Designcnnaccelerators
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9
Lab code for three-day lecture, "Designing CNN Accelerators using Bluespec System Verilog", given at SNU in December 2017
Bluelink
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8
Bluespec SystemVerilog library for use of the IBM Coherent Accelerator-Processor Interface (CAPI)
Yosys Bluespec
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8
Yosys plugin for synthesis of Bluespec code
Leap Hls
⭐
7
Rapid system integration of high-level synthesis kernels using the LEAP FPGA framework
Knowledge Base
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7
CometBFT team public knowledge base. Always a work-in-progress.
Bsc Testsuite
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6
Test suite for Bluespec Compiler (BSC)
Altsourceprobe
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6
Altera JTAG Source/Probe wrapper for Bluespec
Cheri Cap Lib
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5
A library of specific implementations of cheri and providing an abstract interface to those implementations
Shoal
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5
A Network Architecture for Disaggregated Racks
Melodica
⭐
5
A posit arithmetic unit which implements Quire. Designed to be used both as a functional unit or as a tightly coupled accelerator.
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1-33 of 33 search results
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