Avsdpll_3v3

This repository contains simulation files and other relevant files on the On-chip clock multiplier (PLL) (Fclkin—5MHz to 12MHz, Fclkout—40MHZ to 100MHZ at 1.8v)IP worked on in the VSD Online Internship.

Categories > User Interface Components > Clock

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License

apache-2.0

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Most Recent Commit

3 years ago

Programming Language

SourcePawn

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User Interface Components > Clock

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