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Zynqnet
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Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"
A Framework For Developing Neural Networks In Hardware Accelerators
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This framework was part of the Diploma thesis titled "Architectures and Implementations of the Neural Network LeNet-5 in FPGAs". The main goal of this thesis was to create a LeNet-5 implementation in an FPGA development board, but also form a reusable framework/workflow which can be modified to model and develop other Neural Networks as well.
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