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The Top 11 Verilog Wishbone Open Source Projects

Open source projects categorized as Verilog Wishbone
Categories > Hardware > Verilog
Categories > Wishbone
Zipcpu ⭐ 1,139
A small, light weight, RISC CPU soft core
most recent commit 3 months ago
Wb2axip ⭐ 409
Bus bridges and other odds and ends
most recent commit 3 months ago
Wbuart32 ⭐ 237
A simple, basic, formally verified UART controller
most recent commit 3 months ago
Autofpga ⭐ 153
A utility for Composing FPGA designs from Peripherals
most recent commit 3 months ago
Sdspi ⭐ 91
SD-Card controller, using a SPI interface that is (optionally) shared
most recent commit 8 months ago
Openarty ⭐ 77
An Open Source configuration of the Arty platform
most recent commit 4 years ago
Wbscope ⭐ 67
A wishbone controlled scope for FPGA's
most recent commit 3 months ago
Dbgbus ⭐ 31
A collection of debugging busses developed and presented at zipcpu.com
most recent commit 3 months ago
S6soc ⭐ 24
CMod-S6 SoC
most recent commit 6 years ago
Wbfmtx ⭐ 19
A wishbone controlled FM transmitter hack
most recent commit 3 months ago
Computer System ⭐ 9
同济大学CS《计算机系统实验》实验二TongJi University CS computer system experiment assignment 2《自己动手写 CPU》SOPC实现与操作系统移植
most recent commit a year ago
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