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The Top 2 Verification Verilog Hdl Open Source Projects

Open source projects categorized as Verification Verilog Hdl

Categories > Software Quality > Verification

Categories > Verilog Hdl

VUnit is a unit testing framework for VHDL/SystemVerilog

dependent packages 5total releases 87most recent commit 23 days ago

pypi vunit-hdl} Downloads

Async_fifo ⭐ 173

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

most recent commit a year ago

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