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The Top 23 Synthesis Vhdl Open Source Projects

Open source projects categorized as Synthesis Vhdl
Categories > Media > Synthesis
Categories > Hardware > Vhdl
Awesome Hdl ⭐ 830
Hardware Description Languages
most recent commit 3 months ago
Edalize ⭐ 573
An abstraction library for interfacing EDA tools
dependent packages 3total releases 24most recent commit 3 months agopypi edalize} Downloads
Pipelinec ⭐ 519
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
most recent commit 3 months ago
Poc ⭐ 324
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
most recent commit 4 years ago
Ghdl Yosys Plugin ⭐ 270
VHDL synthesis (based on ghdl)
most recent commit 6 months ago
Yodl ⭐ 96
A VHDL frontend for Yosys
most recent commit 7 years ago
Freezing Spice ⭐ 88
A pipelined RISCV implementation in VHDL
most recent commit 5 years ago
Reonv ⭐ 61
ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 architecture, now changed to RISC-V ISA.
most recent commit 2 years ago
Json For Vhdl ⭐ 61
A JSON library implemented in VHDL.
most recent commit 2 years ago
Psl_with_ghdl ⭐ 54
Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
most recent commit a year ago
Vivado Kmeans ⭐ 42
Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs
most recent commit 7 years ago
Xpm_vhdl ⭐ 38
A translation of the Xilinx XPM library to VHDL for simulation purposes
most recent commit a year ago
Docker ⭐ 34
Scripts to build and use docker images including GHDL
most recent commit 5 months ago
Xeda ⭐ 30
Cross EDA Abstraction and Automation
total releases 34most recent commit 4 months ago
Aes128 Hdl ⭐ 24
A high-throughput VHDL and SystemVerilog implementation of AES-128 including scripts for a full front-end design process.
most recent commit 9 years ago
Aes Vhdl ⭐ 23
VHDL Implementation of AES Algorithm
most recent commit 3 years ago
Edif2qmasm ⭐ 21
Run hardware descriptions on a quantum annealer
most recent commit 2 years ago
Design And Asic Implementation Of 32 Point Fft Processor ⭐ 20
I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. A single-path delay commutator processing element (SDC PE) has been proposed for the first time. It saves a complex adder compared with the typical radix-2 butterfly unit. The new pipelined architecture can be built using the proposed processing element. The proposed architecture can lead to 100% hardware utilization and 50% reduction in the overall number of a
most recent commit 5 months ago
Hwthls ⭐ 20
LLVM based HLS library for HWToolkit (hardware devel. toolkit)
most recent commit a year ago
Fgpu ⭐ 20
FGPU is a soft GPU architecture general purpose computing
most recent commit 6 years ago
Poc Examples ⭐ 19
This repository contains synthesizable examples which use the PoC-Library.
most recent commit 3 years ago
Picoblaze Library ⭐ 18
The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a Chip (SoC or SoFPGA).
most recent commit 9 years ago
Vhdl_courses ⭐ 14
courses to learn VHDL
most recent commit 2 years ago
The 2 Latest Releases In Synthesis Vhdl Open Source Projects
Edalize ⭐ 573
An abstraction library for interfacing EDA tools
dependent packages 3total releases 24latest release December 08, 2023most recent commit 3 months agopypi edalize} Downloads
Xeda ⭐ 30
Cross EDA Abstraction and Automation
total releases 34latest release July 26, 2023most recent commit 4 months ago
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