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The Top 23 Scala Verilog Open Source Projects

Open source projects categorized as Scala Verilog
Chisel ⭐ 3,685
Chisel: A Modern Hardware Design Language
dependent packages 9total releases 59most recent commit 14 days ago
Spinalhdl ⭐ 1,451
Scala based HDL
dependent packages 4total releases 140most recent commit 3 months ago
Chisel Bootcamp ⭐ 863
Generator Bootcamp Material: Learn Chisel the Right Way
most recent commit 5 months ago
Riscv Sodor ⭐ 619
educational microarchitectures for risc-v isa
most recent commit 3 months ago
Dinocpu ⭐ 101
A teaching-focused RISC-V CPU design used at UC Davis
most recent commit a year ago
Bottlerocket ⭐ 83
most recent commit 6 years ago
J1sc ⭐ 72
A reimplementation of a tiny stack CPU
most recent commit a year ago
Duh ⭐ 68
👾 Design ∪ Hardware
dependent packages 2total releases 47most recent commit 6 months agonpm duh} Downloads
Sv2chisel ⭐ 59
(System)Verilog to Chisel translator
total releases 4most recent commit 2 years ago
Flexpret ⭐ 53
most recent commit 6 months ago
Synthesijer ⭐ 47
most recent commit 3 years ago
Fuxi ⭐ 40
Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
most recent commit 3 years ago
Cynth ⭐ 40
a simple C-to-Verilog compiler
most recent commit 7 years ago
Spinalcrypto ⭐ 36
SpinalHDL - Cryptography libraries
most recent commit a year ago
Proteus ⭐ 27
The SpinalHDL design of the Proteus core, an extensible RISC-V core.
most recent commit 7 months ago
Hardposit Chisel3 ⭐ 26
Chisel library for Unum Type-III Posit Arithmetic
most recent commit 6 months ago
Vexriscv Verilog ⭐ 24
Using VexRiscv without installing Scala
most recent commit 2 years ago
Ofdm ⭐ 14
Chisel Things for OFDM
most recent commit 4 years ago
Neuralhdl ⭐ 13
most recent commit 7 years ago
Pqriscv Vexriscv ⭐ 13
VexRiscv reference platforms for the pqriscv project
most recent commit 7 months ago
Veriscala ⭐ 12
most recent commit 7 years ago
Spinaldev ⭐ 12
Docker Development Environment for SpinalHDL
most recent commit 4 years ago
Fft ⭐ 11
most recent commit 4 years ago
The 3 Most Depended On Scala Verilog Open Source Projects
Chisel ⭐ 3,685
Chisel: A Modern Hardware Design Language
dependent packages 9total releases 59latest release April 14, 2023most recent commit 14 days ago
Spinalhdl ⭐ 1,451
Scala based HDL
dependent packages 4total releases 140latest release November 01, 2023most recent commit 3 months ago
Duh ⭐ 68
👾 Design ∪ Hardware
dependent packages 2total releases 47latest release October 17, 2023most recent commit 6 months agonpm duh} Downloads
The 5 Latest Releases In Scala Verilog Open Source Projects
Spinalhdl ⭐ 1,451
Scala based HDL
dependent packages 4total releases 140latest release November 01, 2023most recent commit 3 months ago
Duh ⭐ 68
👾 Design ∪ Hardware
dependent packages 2total releases 47latest release October 17, 2023most recent commit 6 months agonpm duh} Downloads
Chisel ⭐ 3,685
Chisel: A Modern Hardware Design Language
dependent packages 9total releases 59latest release April 14, 2023most recent commit 14 days ago
Sv2chisel ⭐ 59
(System)Verilog to Chisel translator
total releases 4latest release February 17, 2022most recent commit 2 years ago
Aes_chisel ⭐ 10
Implementation of the Advanced Encryption Standard in Chisel
total releases 2latest release April 04, 2019most recent commit 2 years ago
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