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The Top 10 Neorv32 Open Source Projects

Open source projects categorized as Neorv32
Categories > Neorv32
Neorv32 ⭐ 1,337
🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
most recent commit 3 months ago
Neotrng ⭐ 113
🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
most recent commit 5 months ago
Riscv Gcc Prebuilt ⭐ 62
📦 Prebuilt RISC-V GCC toolchains for x64 Linux.
most recent commit 4 months ago
Fpga_puf ⭐ 60
🔑 Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
most recent commit a year ago
Neorv32 Setups ⭐ 44
📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
most recent commit 3 months ago
Neorv32 Verilog ⭐ 35
♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
most recent commit 3 months ago
Sweetada ⭐ 28
Ada-language framework
most recent commit 3 months ago
Neorv32 Riscof ⭐ 22
✔️Port of RISCOF to verify the NEORV32 Processor for RISC-V ISA compatibility.
most recent commit 3 months ago
Wb_spi_bridge ⭐ 12
🌉 A transparent Wishbone-to-SPI bridge supporting Execute-In-Place (XIP).
most recent commit 2 years ago
Riscv Debug Dtm ⭐ 11
🐛 JTAG debug transport module (DTM) - compatible to the RISC-V debug specification.
most recent commit a year ago
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