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The Top 19 Java Verilog Open Source Projects

Open source projects categorized as Java Verilog
Digital ⭐ 3,476
A digital logic designer and circuit simulator.
most recent commit 3 months ago
Cello ⭐ 616
Genetic circuit design automation
most recent commit 4 years ago
Verilog Format ⭐ 149
Verilog formatter
most recent commit 4 months ago
Synthesijer ⭐ 47
most recent commit 3 years ago
Qupla ⭐ 40
A QUbic Programming LAnguage
most recent commit 4 years ago
Cse Mit Manipal ⭐ 26
The collective code required for completing a 4-year B.Tech Computer Science Engineering Course.
most recent commit 2 years ago
Tlv Comp ⭐ 18
most recent commit 3 years ago
Vdt Plugin ⭐ 15
mirror of https://git.elphel.com/Elphel/vdt-plugin
most recent commit 6 years ago
Yahdl ⭐ 15
A programming language for FPGAs.
most recent commit 6 years ago
Waveview ⭐ 14
Digital Waveform Viewer
most recent commit 3 months ago
Fpganes_release ⭐ 11
Reconstructing NES game console on Altera DE1-SOC FPGA using System Verilog
most recent commit 7 years ago
Fizzim2 ⭐ 9
FSM (Finite State Machine) tools for Verilog HDL.
most recent commit a year ago
Netlist Graph ⭐ 8
Java library for parsing and manipulating graph representations of gate-level Verilog netlists
most recent commit 7 years ago
Gtuedu ⭐ 7
Gebze Technical University
most recent commit 9 months ago
Xprova ⭐ 6
Formal verification engine for Verilog with built-in support for simulating flip-flop metastability
most recent commit 7 years ago
Fake_fpga ⭐ 6
A GUI pretending to be a DE1 for visualizing Verilog sims
most recent commit 4 years ago
Cse Lab Solutions ⭐ 6
Comprehensive CSE Lab Solutions repo; encompassing all my lab manuals, codes, documents, and endsem questions from my B.Tech program (2020-2024).
most recent commit 4 months ago
Digiblock ⭐ 5
most recent commit 4 years ago
Phloppy_0 ⭐ 5
Commodore Amiga floppy drive emulator
most recent commit 6 years ago
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