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The Top 14 Fpga Vhdl Systemverilog Open Source Projects

Open source projects categorized as Fpga Vhdl Systemverilog
Categories > Hardware > Fpga
Categories > Systemverilog
Categories > Hardware > Vhdl
Clash Compiler ⭐ 1,336
Haskell to VHDL/Verilog/SystemVerilog compiler
total releases 87most recent commit 3 months ago
Edalize ⭐ 573
An abstraction library for interfacing EDA tools
dependent packages 3total releases 24most recent commit 3 months agopypi edalize} Downloads
Vscode Teroshdl ⭐ 457
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
most recent commit 3 months ago
Rggen ⭐ 261
Code generation tool for configuration and status registers
total releases 62most recent commit 3 months ago
Hdlconvertor ⭐ 258
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
dependent packages 1total releases 19most recent commit 3 months agopypi hdlConvertor} Downloads
Hwt ⭐ 189
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
dependent packages 3total releases 34most recent commit 4 months agopypi hwt} Downloads
Fpu ⭐ 37
IEEE 754 floating point library in system-verilog and vhdl
most recent commit 6 months ago
Hdlconvertorast ⭐ 25
Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator
dependent packages 2total releases 11most recent commit 6 months agopypi hdlConvertorAst} Downloads
Ndk App Minimal ⭐ 20
Minimal Application based on Network Development Kit (NDK) for FPGA cards
most recent commit 3 months ago
Hwthls ⭐ 20
LLVM based HLS library for HWToolkit (hardware devel. toolkit)
most recent commit a year ago
Fpu Sp ⭐ 19
IEEE 754 floating point library in system-verilog and vhdl
most recent commit 5 months ago
Digital Hardware Modelling ⭐ 11
Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
most recent commit 3 years ago
Verilog Basic ⭐ 10
learn the combinational and sequential logic circuit.
most recent commit 3 months ago
Edapack ⭐ 6
Provides a packaged collection of open source EDA tools
most recent commit 5 years ago
The 4 Most Depended On Fpga Vhdl Systemverilog Open Source Projects
Edalize ⭐ 573
An abstraction library for interfacing EDA tools
dependent packages 3total releases 24latest release December 08, 2023most recent commit 3 months agopypi edalize} Downloads
Hwt ⭐ 189
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
dependent packages 3total releases 34latest release July 01, 2021most recent commit 4 months agopypi hwt} Downloads
Hdlconvertorast ⭐ 25
Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator
dependent packages 2total releases 11latest release October 23, 2023most recent commit 6 months agopypi hdlConvertorAst} Downloads
Hdlconvertor ⭐ 258
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
dependent packages 1total releases 19latest release July 02, 2021most recent commit 3 months agopypi hdlConvertor} Downloads
The 6 Latest Releases In Fpga Vhdl Systemverilog Open Source Projects
Edalize ⭐ 573
An abstraction library for interfacing EDA tools
dependent packages 3total releases 24latest release December 08, 2023most recent commit 3 months agopypi edalize} Downloads
Clash Compiler ⭐ 1,336
Haskell to VHDL/Verilog/SystemVerilog compiler
total releases 87latest release November 11, 2023most recent commit 3 months ago
Hdlconvertorast ⭐ 25
Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator
dependent packages 2total releases 11latest release October 23, 2023most recent commit 6 months agopypi hdlConvertorAst} Downloads
Rggen ⭐ 261
Code generation tool for configuration and status registers
total releases 62latest release October 18, 2023most recent commit 3 months ago
Hdlconvertor ⭐ 258
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
dependent packages 1total releases 19latest release July 02, 2021most recent commit 3 months agopypi hdlConvertor} Downloads
Hwt ⭐ 189
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
dependent packages 3total releases 34latest release July 01, 2021most recent commit 4 months agopypi hwt} Downloads
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