Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
---|---|---|---|---|---|---|---|---|---|---|
Pipelinec | 519 | 2 months ago | 82 | gpl-3.0 | Python | |||||
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature. | ||||||||||
Leros | 87 | 4 months ago | 3 | bsd-2-clause | VHDL | |||||
A Tiny Processor Core | ||||||||||
Siafpgaminer | 44 | 6 years ago | 1 | mit | VHDL | |||||
VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin | ||||||||||
T02x | 16 | a year ago | VHDL | |||||||
A multi-threaded microprocessor interleaving as minimum two threads, which is pin-to-pin compatible with pulpino riscy cores | ||||||||||
Gs4502b | 11 | 6 years ago | VHDL | |||||||
Experimental pipelined 4502 CPU design | ||||||||||
Bitmap Vhdl Package | 9 | 6 years ago | n,ull | mit | VHDL | |||||
A vhdl package for reading and writing bitmap files. | ||||||||||
Cmips | 9 | 5 years ago | gpl-3.0 | VHDL | ||||||
All things related to cMIPS, a synthesizable VHDL model for the 5-stage pipeline, MIPS32r2 core. | ||||||||||
Risc63 | 8 | a year ago | apache-2.0 | VHDL | ||||||
Custom 64-bit pipelined RISC processor | ||||||||||
Maestro | 5 | 4 years ago | mit | VHDL | ||||||
A 5 stage-pipeline RV32I implementation in VHDL |