Fp2p
fp2p - FPGA Port To Pin. Utility for safe and reusable port to pin assignment in multi-board FPGA designs.
| Project Name | Stars | Downloads | Repos Using This | Packages Using This | Most Recent Commit | Total Releases | Latest Release | Open Issues | License | Language |
|---|---|---|---|---|---|---|---|---|---|---|
| Axi | 834 | 4 months ago | 49 | other | SystemVerilog | |||||
| AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication | ||||||||||
| Up5k | 53 | 3 years ago | 1 | Verilog | ||||||
| Upduino v2 with the ice40 up5k FPGA demos | ||||||||||
| Pano_man | 24 | 4 years ago | VHDL | |||||||
| Simulation of the classic Pacman arcade game on a PanoLogic thin client. | ||||||||||
| Fejkon | 22 | 3 years ago | 22 | gpl-3.0 | Tcl | |||||
| Fibre Channel / FICON HBA implemented on FPGA | ||||||||||
| Z80 Fpga | 17 | 4 years ago | 2 | gpl-3.0 | Assembly | |||||
| Z80 CPU for OpenFPGAs, with Icestudio | ||||||||||
| Mecrisp Ice | 17 | 8 years ago | 2 | bsd-3-clause | Forth | |||||
| http://mecrisp.sourceforge.net/ Mecrisp-Ice is an enhanced version of Swapforth and the J1a stack processor by James Bowman, featuring three MSP430 style IO ports, a tick counter, constant folding, inlining and tail-call optimisations | ||||||||||
| Ms108 2020 | 13 | 3 years ago | 2 | C++ | ||||||
| Maplemojo | 13 | 3 years ago | bsd-2-clause | C | ||||||
| Maple bus for the Mojo FPGA board | ||||||||||
| Panog2_linux | 8 | 10 months ago | 1 | Makefile | ||||||
| Prebuilt images for Linux for the Pano Logic G2 | ||||||||||
| Entity Block | 7 | 10 months ago | gpl-3.0 | C++ | ||||||
| Creates a .SVG symbol from a VHDL entity. Colors and some other properties can be adjusted. | ||||||||||
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Python
Port
Fpga