Reonv

ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 architecture, now changed to RISC-V ISA.

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License

gpl-3.0

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Most Recent Commit

2 years ago

Programming Language

VHDL

Categories

Media > Synthesis

Hardware > Vhdl

Compilers > Sparc

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Project Name	Stars	Most Recent Commit	Open Issues	License	Language
Reonv	61	2 years ago	6	gpl-3.0	VHDL
ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 architecture, now changed to RISC-V ISA.
Sparcv8 Monocycle	5	8 years ago		gpl-3.0	VHDL
Procesador monociclo arquitectura SPARC V8 modelado en VHDL.

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Reonv ⭐ 61

ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 architecture, now changed to RISC-V ISA.

most recent commit 2 years ago

Sparcv8 Monocycle ⭐ 5

Procesador monociclo arquitectura SPARC V8 modelado en VHDL.

most recent commit 8 years ago

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Reonv vs Sparcv8 Monocycle

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