Project Name	Stars	Most Recent Commit	Total Releases	Latest Release	Open Issues	License	Language
Pymtl	149	4 years ago			81	bsd-3-clause	Python
Python-based hardware modeling framework
Opencgra	90	a year ago			1	other	Verilog
OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.
Pypycore	57	10 years ago			6		Python
gevent.core implemented as cffi module, might be used with pypy
Pymtl3 Net	28	7 months ago	14	January 14, 2022	13	bsd-3-clause	Python
Project repo for the POSH on-chip network generator

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Pymtl ⭐ 149

Python-based hardware modeling framework

most recent commit 4 years ago

Opencgra ⭐ 90

OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.

most recent commit a year ago

Pypycore ⭐ 57

gevent.core implemented as cffi module, might be used with pypy

most recent commit 10 years ago

Pymtl3 Net ⭐ 28

Project repo for the POSH on-chip network generator

total releases 14most recent commit 7 months ago

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