Awesome Open Source
Search
Programming Languages
Languages
All Categories
Categories
About

Simple_reg_model

System verilog register model for uvm testbenches.
Stars
8
License
mit
Open Issues
1
Most Recent Commit
6 years ago
Programming Language
Perl
Categories
Repo
Suggest An Alternative To simple_reg_model
Popular Verilog Projects
Chisel ⭐ 3,685
Chisel: A Modern Hardware Design Language
dependent packages 9total releases 59latest release April 14, 2023most recent commit 18 days ago
Iverilog ⭐ 2,521
Icarus Verilog
most recent commit 3 months ago
Popular Tar Projects
Kaniko ⭐ 13,461
Build Container Images In Kubernetes
dependent packages 4total releases 71latest release November 29, 2023most recent commit 3 months ago
Archiver ⭐ 4,170
Easily create & extract archives, and compress & decompress files of various formats
dependent packages 713total releases 26latest release November 22, 2021most recent commit 3 months ago
Sharpziplib ⭐ 3,449
#ziplib is a Zip, GZip, Tar and BZip2 library written entirely in C# for the .NET platform.
dependent packages 1,140total releases 15latest release January 30, 2023most recent commit 8 months agonuget SharpZipLib} Downloads
Tarsgo ⭐ 3,271
A high performance microservice framework in golang. A linux foundation project.
dependent packages 29total releases 48latest release June 28, 2023most recent commit 3 months ago
Popular Hardware Categories
Arduino
Raspberry Pi
Camera
Sensor
Gpu
Firmware
Usb
Keyboard
Cpu
Arm

Get A Weekly Email With Trending Projects For These Categories
No Spam. Unsubscribe easily at any time.
Perl
Verilog
Tar
Privacy | About | Terms | Follow Us On Twitter

Downloads, Dependent Repos, Dependent Packages, Total Releases, Latest Releases data powered by Libraries.io.

Copyright 2018-2024 Awesome Open Source.  All rights reserved.